According to conventional semiconductor device manufacturing processes, a photolithography process sequentially performing a resist applying process of forming a resist film by applying a resist liquid on a semiconductor wafer (hereinafter, referred to as “wafer”), an exposure process of exposing a predetermined pattern on the corresponding resist film, and a developing process of developing the exposed resist film is performed such that a predetermined resist pattern may be formed on the wafer. By using the resist pattern as a mask, an etching process of a film to be processed on the wafer is performed, and after that, the resist film is removed and a predetermined pattern is formed on the film to be processed.
When forming the pattern of the film to be processed that is described above, fine patterns are required to be formed on the corresponding film to be processed in order to achieve high integration of a semiconductor device. In general, a limitation in miniaturization in the photolithography process is about a wavelength of light used in the exposure process. Thus, wavelength of the light used in the exposure process has been narrowed, according to the conventional art. However, there are technical and economical limitations in narrowing the wavelength of an exposure light source, and it is difficult to form fine patterns of, for example, a few nano-meter order, on a surface of the film to be processed only by narrowing the wavelength of the light.
Therefore, a so-called side wall transfer (SWT) method, in which a mask is formed on opposite side wall portions of line portions in the resist pattern by using a SiO2 film as a sacrificial film, has been suggested. The SWT method performs a patterning of the film to be processed to be finer pitches than those of the resist pattern that is formed on the wafer by performing the photolithography process at an initial stage. That is, according to the SWT method, a sacrificial film is formed on the resist pattern, and the sacrificial film is etched so as to remain only on side wall portions of line portions in the resist pattern. After that, the resist pattern is removed, and a pattern of the sacrificial film is formed on the film to be processed of the wafer. Then, the film to be processed is etched by using the fine sacrificial film pattern as a mask, so that fine patterns of the film to be processed are formed on the wafer (Patent Reference 1).
In addition, in order to obtain higher integration of the semiconductor device as described above, sizes of structures on the wafer, that is, patterns of the sacrificial film or the film to be processed, have to be measured exactly when manufacturing the semiconductor device. In addition, a result of the measurement is applied to processing conditions of the wafer, and thus, the wafer may be appropriately processed and a high throughput may be realized.
Conventionally, in order to measure sizes or shapes of the patterns formed on the wafer, a method of observing the patterns with a scanning electron microscope has been used. However, according to the conventional method using the scanning electron microscope, a vacuum apparatus is necessary, and the wafer has to be cleaved, that is, the wafer itself has to be damaged, in order to measure a cross-section of the wafer for measuring a three-dimensional shape such as a height of the pattern or the like.
Therefore, a scatterometry method has been suggested in order to nondestructively measure sizes of patterns formed on the wafer exactly and rapidly. According to the scatterometry method, a diffracted light beam (spectrum) generated when a light beam is irradiated onto an arbitrary repeated pattern shape is calculated to generate library thereof in advance. In addition, a light beam is irradiated onto an actual pattern that is an object to be measured, and a spectrum of light reflected from the pattern is measured. The measurement result and spectrum of the library are matched so as to estimate a pattern shape of an appropriate spectrum in the library as the actual pattern shape. By using the above method, even when the patterns formed on the wafer are fine, a size of a predetermined pattern on the wafer can be measured through the pattern matching by using the library (Patent Reference 2).